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 PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
Rev. 01 -- 30 October 2002 Product data
1. Description
The PCKEP14 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the PCKEP14 is operating under PECL conditions. The PCKEP14 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device, and from device to device. To ensure that the tight skew specification is realized, both sides of any differential output need to be terminated identically into 50 resistors, even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) without affecting skew. The common enable (EN) is synchronous, outputs are enabled/disabled in the LOW state. This avoids a runt clock pulse when the device is enabled/disabled, as can happen with an asynchronous control. The internal flip-flop is clocked on the falling edge of the input clock, therefore, all associated specification limits are referenced to the negative edge of the clock input. The PCKEP14, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the PCKEP14 to be used for high performance clock distribution in +3.3 V or +2.5 V systems.
2. Features
s s s s s s s s s 100 ps device-to-device skew 25 ps within device skew 400 ps typical propagation delay Maximum frequency > 2 GHz (typical) Contains temperature compensation PECL and HSTL mode: VCC = 2.375 V to 3.8 V with VEE = 0 V NECL mode: VCC = 0 V with VEE = -2.375 V to -3.8 V LVDS input compatible Open input default state.
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
3. Pinning information
3.1 Pinning
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4
1 2 3 4
20 VCC 19 EN 18 VCC 17 CLK1
Q0 1 Q0 2 Q1 3
20 VCC 19 EN 18 VCC
PCKEP14PW
Q1 4 Q2 5 Q2 6 Q3 7 Q3 8 Q4 9 Q4 10
17 CLK1 16 CLK1 15 VBB 14 CLK0 13 CLK0 12 CLK_SEL 11 VEE
PCKEP14D
5 6 7 8 9
16 CLK1 15 VBB 14 CLK0 13 CLK0 12 CLK_SEL 11 VEE
Q4 10
002aaa354
002aaa221
Fig 1. SO20 pin configuration.
Fig 2. TSSOP20 pin configuration.
3.2 Pin description
Table 1: Symbol Q0-Q4 Q0-Q4 VEE CLK_SEL CLK0, CLK1 CLK0, CLK1 VBB VCC EN Pin description Pin 1, 3, 5, 7, 9 2, 4, 6, 8, 10 11 12 13, 16 14, 17 15 18, 20 19 Description Positive ECL/PECL output Negative ECL/PECL output Negative supply ECL/PECL active clock select input. Pin will default LOW when left open. ECL/PECL/HSTL CLK input. Pins will default LOW when left open. ECL/PECL/HSTL CLK input. Pins will default to VCC/2 when left open. Reference voltage output Positive supply ECL synchronous enable
3.2.1
Power supply connection
CAUTION All VCC and VEE pins must be connected to power supply to guarantee proper operation.
MSC895
9397 750 09565
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
2 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
4. Ordering information
Table 2: Ordering information Package Name PCKEP14D PCKEP14PW SO20 TSSOP20 Description plastic small outline package 8 leads; body width 7.5 mm plastic thin shrink small outline package; 20 leads; body width 4.4 mm Version SOT163-1 SOT360-1 Type number
5. Logic diagram
Q0
1
20
VCC
Q0
2
19
EN
Q1
3
18
VCC
Q1
4 D Q 5
17
CLK1
Q2
16
CLK1
Q2
6
1 0
15
VBB
Q3
7
14
CLK0
Q3
8
13
CLK0
Q4
9
12
CLK_SEL
Q4
10
11
VEE
002aaa222
Fig 3. Logic diagram.
CAUTION All VCC and VEE pins must be connected to power supply to guarantee proper operation.
MSC895
9397 750 09565
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
3 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
6. Function table
Table 3: CLK0 L H X X X
[1]
Function table CLK1 X X L H X CLK_SEL L L H H X EN L L L L H Q L H L H L[1]
On next negative transition of CLK0 or CLK1.
7. Attributes
Table 4: Attributes Value 75 k 37.5 k Human Body Model Machine Model Charged Device Model moisture sensitivity, indefinite time out of drypack flammability rating Meets or exceeds JEDEC Specification EIA/JEDS78 IC latch-up test. > 2.5 kV > 100 V > 1 kV Level 1 UL-94 code V-0 A 1/8" Characteristic internal input pull-down resistor internal input pull-up resistor ESD protection
9397 750 09565
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
4 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
8. Limiting values
Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC VEE VI Iout IBB Tamb Tstg Rth(j-a) Rth(j-c) Tsld Parameter PECL mode power supply NECL mode power supply PECL mode input voltage NECL mode input voltage output current VBB source current operating ambient temperature storage temperature range thermal resistance from junction to ambient thermal resistance from junction to case soldering temperature 0 LFPM 500 LFPM Conditions VEE = 0 V VCC = 0 V VEE = 0 V; VI VCC VCC = 0 V; VI VEE continuous surge Min 0 -40 -65 23 Max 4.1 -4.1 4.1 -4.1 50 100 0.1 +85 +150 140 100 41 265 Unit V V V V mA mA mA C C C/W C/W C/W C
9. Static characteristics
Table 6: PECL DC characteristics[1] VCC = 2.5 V; VEE = 0 V [2] Symbol IEE VOH VOL VIH VIL VIHCMR Parameter power supply current HIGH-level output voltage LOW-level output voltage HIGH-level input voltage LOW-level input voltage HIGH-level input voltage, common mode range (differential) HIGH-level input current LOW-level input current output reference voltage CLK CLK VBB
[1] [2] [3] [4]
[3]
Conditions
Tamb = -40 C Min 45 Typ 60 Max 75
Tamb = +25 C Min 45 Typ 60 Max 75
Tamb = +85 C Min 45 Typ 60 Max 75
Unit mA
1355 1480 1605 1355 1500 1605 1355 1510 1605 mV 555 555 720 805 875 2.5 555 555 1.2 700 805 875 2.5 555 555 1.2 710 805 875 2.5 mV mV V
[3]
single-ended single-ended
[4]
1335 1.2
1620 1335 -
1620 1275 -
1620 mV
IIH IIL
0.5
-
150 -
0.5
-
150 -
0.5
-
150 -
A A A
-150 -
-150 -
-150 -
1075 1165 1265 1065 1165 1265 1085 1180 1270 mV
Devices are designed to meet the DC specifications shown in this table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 LFPM is maintained. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to -1.3 V. All loading with 50 to VCC - 2 V. VIHCMR(min) varies 1:1 with VEE, VIHCMR(max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
9397 750 09565
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
5 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
Table 7: PECL DC characteristics[1] VCC = 3.3 V; VEE = 0 V [2] Symbol IEE VOH VOL VIH VIL VBB VIHCMR Parameter power supply current HIGH-level output voltage LOW-level output voltage HIGH-level input voltage output reference voltage HIGH-level input voltage, common mode range (differential) HIGH-level input current LOW-level input current CLK CLK
[1] [2] [3] [4] [5]
[3]
Conditions 45
Tamb = -40 C Min Typ 60 Max 75 45
Tamb = +25 C Min Typ 60 Max 75 45
Tamb = +85 C Min Typ 60 Max 75
Unit mA
2155 2280 2405 2155 2300 2405 2155 2310 2405 mV 1355 1515 1605 1355 1500 1605 1355 1500 1605 mV 2135 1355 2420 2135 1675 1355 2420 2135 1675 1355 2420 mV 1675 mV
[3]
single-ended
LOW-level input voltage single-ended
[4]
1875 1965 2065 1865 1965 2065 1885 1980 2070 mV 1.2 3.3 1.2 3.3 1.2 3.3 V
[5]
IIH IIL
0.5
-
150 -
0.5
-
150 -
0.5
-
150 -
A A A
-150 -
-150 -
-150 -
Devices are designed to meet the DC specifications shown in this table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 LFPM is maintained. Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to -0.5 V. All loading with 50 to VCC - 2 V. Single-ended input operation is limited to VCC 3.0 V in PECL mode. VIHCMR(min) varies 1:1 with VEE, VIHCMR(max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
9397 750 09565
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
6 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
Table 8: NECL DC characteristics[1] VCC = 0 V; VEE = -3.8 V to -2.375 V [2] Symbol Parameter IEE VOH VOL VIH VIL VBB VIHCMR power supply current HIGH-level output voltage LOW-level output voltage HIGH-level input voltage LOW-level input voltage output reference voltage HIGH-level input voltage, common mode range (differential) HIGH-level input current LOW-level input current CLK CLK single-ended single-ended
[4] [3]
Conditions 45
Tamb = -40 C Min Typ 60 Max 75 45
Tamb = +25 C Min Typ 60 Max 75 45
Tamb = +85 C Min Typ 60 Max 95 -895
Unit mA mV
-1145 -1020 -895
-1145 -1000 -895
-1145 -990
[3]
-1945 -1785 -1695 -1945 -1800 -1695 -1945 -1800 -1695 mV -1165 -1945 -880 -1165 -880 -1165 -880 mV
-1625 -1945 -
-1625 -1945 -
-1625 mV
-1425 -1335 -1235 -1435 -1335 -1235 -1415 -1320 -1230 mV VEE+1.2 0 VEE+1.2 0 VEE+1.2 0 V
[5]
IIH IIL
0.5 -150
-
150 -
0.5 -150
-
150 -
0.5 -150
-
150 -
A A A
[1] [2] [3] [4] [5]
Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 LFPM is maintained. Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to -0.5 V. All loading with 50 to VCC - 2 V. Single-ended input operation is limited to VEE 3.0 V in NECL mode. VIHCMR(min) varies 1:1 with VEE, VIHCMR(max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 9: HSTL DC characteristics VCC = 2.375 V to 3.8 V; VEE = 0 V. Symbol Parameter VIH VIL HIGH-level input voltage LOW-level input voltage Conditions Tamb = -40 C Min 1200 Typ 400 Max Tamb = +25 C Min 1200 Typ 400 Max Tamb = +85 C Min 1200 Typ 400 Max mV mV Unit
9397 750 09565
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
7 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
10. Dynamic characteristics
Table 10: AC characteristics (VCC = 0 V; VEE = -2.375 V to -3.8 V) or (VCC = 2.375 V to 3.8 V; VEE = 0 V) [1] Symbol Parameter Conditions see Figure 4 Tamb = -40 C Min
HSTL)
Tamb = +25 C Min 275 100 200 150 125 Typ >2 360 15 150 0.2 50 140 800 200 Max 475 25 175 <1 1200 250
Tamb = +85 C Min 300 100 200 150 125 Typ >2 430 15 200 0.2 50 140 800 200 Max 525 25 225 <1 275
Unit GHz ps ps ps ps ps ps ps
Typ >2 345 10 100 0.2 50 140 800 205
Max 425 25 125 <1 1200 250
fmax(PECL/ maximum toggle frequency
250
tPLH, tPHL propagation delay to output differential tSKEW tJITTER tsu th Vi(p-p) tr/tf
[1] [2]
skew time cycle-to-cycle jitter EN set-up time EN hold time minimum input swing output rise/fall times
within-device part-to-part see Figure 4
[2]
100 200 150
1200 mV
(20% - 80%)
125
Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 to VCC - 2.0 V. Skew is measured between outputs under identical transitions.
002aaa223
900 VOUT(p-p) (mV) 800 700 600 500 400 300 200 100 0 0 1000 2000 FREQUENCY (MHz) 3000
9 8 7 6 5 4 3 2 1 0 4000
Fig 4. fmax.
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Product data
Rev. 01 -- 30 October 2002
8 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
11. Application information
Q DRIVER DEVICE Q
D RECEIVER DEVICE D
50
50
VTT
002aaa220
VTT = VCC - 2.0 V.
Fig 5. Typical termination for output driver and device evaluation.
9397 750 09565
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
9 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
12. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
Fig 6. SO20 package outline (SOT163-1).
9397 750 09565 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
10 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
D
E
A
X
c y HE vMA
Z
20
11
Q A2 pin 1 index A1 (A 3) A
Lp L
1
e bp
10
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.10 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 6.6 6.4 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.5 0.2 8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC MO-153 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27
Fig 7. TSSOP20 package outline (SOT360-1).
9397 750 09565 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
11 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
13. Soldering
13.1 Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
13.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C small/thin packages.
13.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high
upward pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
* For packages with leads on four sides, the footprint must be placed at a 45 angle
to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.
9397 750 09565
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Product data
Rev. 01 -- 30 October 2002
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Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
13.4 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
13.5 Package related soldering information
Table 11: Package[1] BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC[4], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO
[1] [2]
Suitability of surface mount IC packages for wave and reflow soldering methods Soldering method Wave not suitable not suitable[3] suitable not recommended[4][5] not recommended[6] Reflow[2] suitable suitable suitable suitable suitable
[3]
[4] [5] [6]
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
14. Revision history
Table 12: Rev Date 01 20021030 Revision history CPCN Description Product data (9397 750 09565) Engineering Change Notice 853-2373 28877 (date: 20020909)
9397 750 09565 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
13 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
15. Data sheet status
Level I II Data sheet status[1] Objective data Preliminary data Product status[2][3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
16. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
17. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 09565
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 30 October 2002
14 of 15
Philips Semiconductors
PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
Contents
1 2 3 3.1 3.2 3.2.1 4 5 6 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 13.5 14 15 16 17 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Power supply connection . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Attributes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Application information. . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 12 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 12 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 13 Package related soldering information . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
(c) Koninklijke Philips Electronics N.V. 2002. Printed in the U.S.A
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 30 October 2002 Document order number: 9397 750 09565


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